Over the last few decades, the electronics industry has undergone a revolution by various efforts to decrease the size of device elements formed in integrated circuits (ICs), and such efforts have contributed to increasing the density of circuit elements and device performance. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines.
Currently, the most common and important semiconductor technology presently used is silicon-based, and the most preferred silicon-based semiconductor device is a MOS (metal oxide semiconductor) transistor. The principal elements of a typical MOS transistor generally comprise a semiconductor substrate on which a gate oxide is provided. A gate electrode is formed on the gate oxide and is typically a heavily doped conductor to which an input signal is typically applied via a gate terminal. Heavily doped active regions, e.g., source/drain regions, are formed in the semiconductor substrate and are connected to source/drain terminals. A channel region is formed in the semiconductor substrate beneath the gate electrode and separates the source/drain regions. The separation of the gate electrode from the semiconductor substrate by the dielectric layer, e.g., the oxide layer, prevents current from flowing between the gate electrode and the source/drain regions or channel regions.
As the dimensions of the MOS devices are further scaled down to submicron and nanometer dimensions, the thickness of the gate oxide is also scaled down accordingly. However, such excessively reduced thickness of the gate oxide causes charge carrier leakage by tunneling effect, thereby leading to faster degradation of the MOS transistor.
To solve this concern, high-k (dielectric constant) gate dielectrics, e.g., ZrO2, HfO2, InO2, LaO2, TaO2, were introduced to replace the silicon oxide for submicron MOS devices. The significant amount of positive fixed charge found within high-k films such as HfO2, ZrO2 and their silicates contributes a large negative flatband voltage shift for CMOSFET devices. This limits the threshold voltage of CMOSFET devices to a given range, although some form of channel implantation may be used to provide a degree of threshold modulation.
It is desirable to modify the flatband voltage, and thus the threshold voltage, of CMOSFET devices employing high-k dielectric films to provide more desirable threshold voltages for such devices. This would allow optimization of the threshold voltages for PMOSFET devices and NMOSFET devices respectively. For example, it is more desirable for the PMOSFET devices to have a higher flatband voltage than NMOSFET devices. (Threshold voltage is directly related to the flatband voltage).